The present invention a concerns data processing device, particularly a data processing device that is used in a system that transmits and receives data packets by means of a serial bus that conforms to IEEE 1394 standards.
In the past, in order to accept audio and video data, and control AV machines with a data processing device such as a personal computer, a separate video capture board, RS232C bus, etc. were required, and unified handling could not be done.
Thus, in recent years, standards suited to data transmission in the multimedia era have been proposed, for example, by means of xe2x80x9cIEEE 1394 high-performance serial bus standards (hereinafter IEEE 1394 standards),xe2x80x9d and environmental improvements have been made so as to be able to freely conduct high-speed, high-volume communication.
One example of a conventional data processing device is represented by reference numeral 101 in FIG. 4. This data processing device 101 conforms to IEEE 1394 standards and is connected to a serial bus (hereinafter IEEE 1394 bus) 106, via which the propagation of data packets is possible. A plurality of other data processing units are connected to this IEEE 1394 bus 106. The data processing device 101 transmits request packets to these other data processing devices by means of said IEEE 1394 bus 106 and is designed to receive a series of response packets corresponding to the request packets formed in the other data processing devices to which the request packets have been transmitted.
The aforementioned data processing device 101 has a packet processing device 102, a transmitting device 103, a packet receiving device 104, a transmitting buffer 105, and a receiving buffer 107. The transmitting device 103 is made up of a plurality of packet transmitting devices; here, three packet transmitting devices 1031-1033.
The output of the packet processing device 102 is connected to the input of the transmitting buffer 105, and the output of the transmitting buffer 105 is connected to the input of the transmitting device 103, and the output of the transmitting device 103 is connected to the IEEE 1394 bus 106.
In the data processing device 101, in transmitting a request packet, first, the packet processing device 102 sequentially forms the request packets according to a prescribed program, and serially outputs them to the transmitting buffer 105. The transmitting buffer 105 is designed as a FIFO (first in, first out) memory for temporarily storing the request packets that are sequentially formed by the packet processing device 102.
Each packet transmitting device 1031-1033 of the transmitting device 103 successively reads the request packets that are stored in the transmitting buffer 105 one at a time and transmits them to the IEEE 1394 bus 106.
When a request packet is sent to the IEEE 1394 bus 106, the other data processing device that is specified by the contents of the request packets becomes the data processing device of the other party and sequentially receives the request packets from the IEEE 1394 bus 106 and reads their contents. The data processing device of the other party reads the data specified in response to the contents of the request packets from a memory region which it itself has, attaches prescribed information to the data that was read, forms sequential response packets corresponding to the request packets, and sequentially transmits them to the IEEE 1394 bus 106.
The input of the packet receiving device 104 is connected to be IEEE 1394 bus 106, the input of the receiving buffer 107 is connected to the output of the packet receiving device 104, and the output of the receiving buffer 107 is connected to the input of the packet processing device 102.
When a response packet reaches the packet receiving device 104, the packet receiving device 104 determines whether the response packet is receivable as a function of the volume available in the receiving buffer 107. Here, the term xe2x80x9creceivexe2x80x9d refers to the time that the response packet reaches the packet receiving device 104 until it is stored in the receiving buffer 107.
Also, if there is space available in the receiving buffer 107 for storing a response packet, the packet receiving device 104 determines that it is possible to receive. The response packet is then output to the receiving buffer 107 via the IEEE 1394 bus 106.
The receiving buffer 107 temporarily stores the response packet that has been input, and outputs it to the packet processing device 102 in response to the requests of the packet processing device 102 that were read. When the response packet is output to the packet processing device 102, the region which that response packet had occupied is released.
The packet processing device 102 conducts such processes as storing the response packets that have been input to the prescribed memory devices.
When a response packet such as the one described above is received by the data processing device 101, an acknowledgement indicating xe2x80x9csuccessxe2x80x9d is returned to the data processing device of the other party, and the fact that the response packet was received is communicated the acknowledgement is made up of 4 bits and indicates whether each transaction was completed.
In the above-mentioned data processing device 101 shown in FIG. 4, the packet transmitting devices 1031 to 1033, after request packets are transmitted, enter a receive standby condition until response packets corresponding to those requests packets are received, and are designed not to transmit new request packets until the fact that a given response packet has been received is acknowledged at the packet receiving device 104 and communicated to each of the packet transmitting devices 1031 to 1033.
Also, each packet transmitting device 1031-1033 is designed to be immediately return to a condition in which a new request packet can be transmitted after being released from the receive standby condition.
Thus, even if the empty volume of the receiving buffer 107 is small and the packet receiving device 104 cannot receive a response packet corresponding to a new request packet, there are cases when the packet transmitting devices (1031 to 1033) transmit as many new request packets as possible.
Thus, because a response packet cannot be received, if a response packet arrives, the data processing device 101 returns a xe2x80x9cbusyxe2x80x9d acknowledgement to the data processing device of the other party.
When a xe2x80x9cbusyxe2x80x9d acknowledgement is returned, the data processing device of the other party retransmits (reattempts) the response packet, and the reattempt is repeated until the packet receiving device 104 can receive the response packet and a xe2x80x9csuccessfulxe2x80x9d acknowledgement is returned, and when a xe2x80x9csuccessfulxe2x80x9d acknowledgement is not returned, the reattempt is repeated only a prescribed number of times. Since the IEEE 1394 bus 106 is used wastefully during this interval, the efficiency of the data exchange is greatly lowered.
In particular, when the data processing device 101 has a plurality of packet transmitting devices 1031 to 1033 as shown in FIG. 4, and the response packets corresponding to the plurality of request packets are transmitted at one time to the IEEE 1394 bus 106, there were many instances when the sum of the data volumes of all of the response packets that were transmitted exceeded the available volume in the receiving buffer 107, and there were frequently instances when the packet receiving device 104 could not receive all of these response packets at one time.
The present invention was designed for the purpose of solving the above-mentioned problems of the prior art, and its purpose is to offer technology which can increase the efficiency for the data exchange if the exchange, of data is conducted in a data processing device that is connected to an IEEE 1394 bus.
In order to solve the above-mentioned problems, the data processing device of one aspect of the present invention has a transmitting device that is connected to the serial bus, and which transmits request packets via the above-mentioned serial bus, a receiving device that is connected to the above-mentioned serial bus, and which receives from the above-mentioned serial a response packet corresponding to the above-mentioned request packet, a receiving buffer that temporarily stores the response packet that is supplied from the above-mentioned receiving device, an evaluation unit that determines the relationship between the data volume of the response packet corresponding to the above-mentioned request packet and the available volume of the above-mentioned receiving buffer; wherein the above-mentioned transmitting device controls the transmission, via the above-mentioned serial bus, of the request packets in response to the results of the above-mentioned evaluation unit.
The data processing device of claim 2 is the data processing device of claim 1 with a plurality of the above-mentioned transmitting devices, wherein the above-mentioned evaluation unit determines the relationship between the total volume of the response packets corresponding to the request packets in the each of the above-mentioned transmitting devices and the volume available, and each of the above-mentioned transmitting devices control the transmission to the above-mentioned serial bus of the request packets in response to the results of the above-mentioned evaluation unit.
Also, the data processing device of claim 3 is the data processing device of another aspect, where the above-mentioned request packet, the above-mentioned response packet, and the above-mentioned serial bus are designed to conform to IEEE 1394 standards.
In the data processing device of the present invention, when the evaluation unit, based on the relationship between the data volume of the response packet corresponding to the request packet that is intended to be transmitted and the volume available in the receiving buffer, determines whether or not the transmission of the request packet intended to be transmitted is possible, and since, based on this decision, the transmitting device does not transmit the request packet that is intended for transfer, for example, when as a result of comparing the data volume of the response packet and the empty volume of the receiving buffer, it is found that the volume of the receiving buffer is too small so that the response packet cannot be received by the receiving device, and the transmitting device does not transmit the request packet intended for transfer then the transmitting device can be designed so that when the request packet intended to be transmitted is transmitted, as much as possible, an empty volume is set aside in the receiving buffer so that the response packet can always be received.
In this way, when the request packet that was intended to be transmitted is transmitted, it can always be made in a condition in which the reception of the response packet is possible.
Therefore, since the request packet intended to be transmitted is not transmitted when the empty volume of the receiving buffer is too small and the response packet cannot be received, reception is denied at the receiving device, and the serial bus is not used wastefully by repeated reattempts. Because of this, compared to the prior art the efficiency of the data exchange can be, increased.
Also, in the data processing device of the present invention, in addition to comparing the data volume of the response packet that corresponds to the request packet that is intended to be transmitted with the empty volume in the receiving buffer, by examining the data volume of the pending request packet, it can be determined whether transmission of the request packet that is intended for transmission is possible.
Thus, when the available volume in the receiving buffer is less than the sum of the data volume of the pending request packet and the data volume of the response packet intended for reception, where the pending request packet and the response packet intended for reception are to be received at one time, then all of the response packets will not be received, and the receiving device can be designed to receive only the request packet intended for transmission.
Therefore, even when the pending request packet and the response packet intended for reception are formed at the same time and are to be continuously received, since an empty volume is maintained in the receiving buffer which can store insofar as is possible, all of the response packets, all of the response packets can be continuously received.
In particular, if the data volume of the pending request packet is large, even if the response packet intended for reception is received and the empty volume of the receiving buffer is small, since that empty volume larger than the data volume of the response packet it is intended to receive, a reception denied condition at the receiving device of the response packet that it is intended to receive can be eliminated.
Thus, since there are no repeated reception denials and reattempts at the receiving device, and a reduction in the efficiency of the data transmission can be eliminated.